Z80 Datasheet, PDF (311/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

Z80 CPU Peripherals
User Manual
291
Table 29. Write Register 6 Transmit Sync
D7
D6
D5
D4
D3
D2
D1
D0
Sync 7 Sync 6 Sync 5 Sync 4 Sync 3 Sync 2 Sync 1 Sync 0
Write Register 7
This register is programmed to contain the receive sync character in the
Monosync mode, a second byte (last eight bits) of a 16-bit sync character in
the Bisync mode, or a flag character (0111 1110) in the SDLC mode. WR7
is not used in the External Sync mode.
Table 30. Write Register 7 Receive Sync
D7
D6
D5
D4
D3
D2
D1
&
Sync 15 Sync 14 Sync 13 Sync 12 Sync 11 Sync 10 Sync 9 Sync 8
D7 D6 D5 D4 D3 D2 D1 D0
SYNC Bit 8
SYNC Bit 9
SYNC Bit 10
SYNC Bit 11
*
SYNC Bit 12
SYNC Bit 13
SYNC Bit 14
SYNC Bit 15
*For SDLC it must be programmed to ‘0111 1110’ for flag recognition
Figure 121. Write Register 7
UM008101-0601
Serial Input/Output