Z80 Datasheet, PDF (113/330 Pages) Zilog, Inc. – Z80 CPU PERIPHERALS

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D7 D6 D5 D4 D3 D2 D1 D0
Base Register Byte
0 0 Do not use
0 1 = Transfer
1 0 = Search
1 1 = Search/Transfer
0 = Port B → Port A
0 = Port A → Port B
Port A starting address (Low Byte)
Port A starting address (High Byte)
Block length (Low Byte)
Block length (High Byte)
Figure 40. Write Register 0 Group
Block Length
All operations must have a declared block length because the default values
at power-up are unpredictable for block length. These registers are written
to by setting pointer bits 5 and 6 in the WR0 base register byte. The block
length can be up to 64 Kbytes. Due to the pipelining method of reading in
data, the number of bytes actually searched or transferred may be one or
two more than the number entered here. “Address and Byte Counting” on
page 75 in “Internal Structure” on page 71 describes this (Table 11).
Programming a block length of zero results in the transfer or search of 216
+ 1 bytes. Therefore, the shortest block length that can be entered is 1,
which usually results in a transfer or search of two bytes (Table 12).
UM008101-0601
Direct Memory Access