UPSD33XX Datasheet, PDF (94/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Pulse Width Selection
The IrDA interface has two ways to modulate the
standard UART1 serial stream:
1. An IrDA data pulse will have a constant pulse
width for any bit time, regardless of the
selected baud rate.
2. An IrDA data pulse will have a pulse width that
is proportional to the the bit time of the
selected baud rate. In this case, an IrDA data
pulse width is 3/16 of its bit time, as shown in
Figure 37., page 92.
The PULSE bit in the SFR named IRDACON de-
termines which method above will be used.
According to the IrDA physical layer specification,
for all baud rates at 115.2k bps and below, the
minimum data pulse width is 1.41µs. For a baud
rate of 115.2k bps, the maximum pulse width
2.23µs. If a constant pulse width is to be used for
all baud rates (PULSE bit = 0), the ideal general
pulse width is 1.63µs, derived from the bit time of
the fastest baud rate (8.68µs bit time for 115.2k
bps rate), multiplied by the proportion, 3/16.
To produce this fixed data pulse width when the
PULSE bit = 0, a prescaler is needed to generate
an internal reference clock, SIRClk, shown in Fig-
ure 36., page 92. SIRClk is derived by dividing the
oscillator clock frequency, f_OSC, using the five bits
CDIV[4:0] in the SFR named IRDACON. A divisor
must be chosen to produce a frequency for SIRClk
that lies between 1.34 MHz and 2.13 MHz, but it is
best to choose a divisor value that produces SIR-
Clk frequency as close to 1.83MHz as possible,
because SIRClk at 1.83MHz will produce an fixed
IrDA data pulse width of 1.63µs. Table 49 provides
recommended values for CDIV[4:0] based on sev-
eral different values of f_OSC.
For reference, SIRClk of 2.13MHz will generate a
fixed IrDA data pulse width of 1.41µs, and SIRClk
of 1.34MHz will generate a fixed data pulse width
of 2.23µs.
Table 49. Recommended CDIV[4:0] Values to Generate SIRClk (default CDIV[4:0] = 0Fh, 15 decimal)
f_OSC (MHz)
Value in CDIV[4:0]
Resulting f_SIRCLK (MHz)
40.00
16h, 22 decimal
1.82
36.864, or 36.00
14h, 20 decimal
1.84, or 1.80
24.00
0Dh, 13 decimal
1.84
11.059, or 12.00
06h, 6 decimal
1.84, or 2.00
7.3728⁽¹⁾
04h, 4 decimal
1.84
Note: 1. When PULSE bit = 0 (fixed data pulse width), this is minimum recommended fOSC because CDIV[4:0] must be 4 or greater.
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