UPSD33XX Datasheet, PDF (65/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
SUPERVISORY FUNCTIONS
Supervisory circuitry on the MCU Module will issue
an internal reset signal to the MCU Module and si-
multaneously to the PSD Module as a result of any
of the following four events:
– The external RESET_IN pin is asserted
– The Low Voltage Detect (LVD) circuitry has
detected a voltage on V_CC below a specific
threshold (power-on or voltage sags)
– The JTAG Debug interface has issued a reset
command
– The Watch Dog Timer (WDT) has timed out
The resulting internal reset signal, MCU_RESET,
will force the 8032 into a known reset state while
asserted, and then 8032 program execution will
jump to the reset vector at program address 0000h
just after MCU_RESET is deasserted. The MCU
Module will also assert an active low internal reset
signal, RESET, to the PSD Module. If needed, the
signal RESET can be driven out to external sys-
tem components through any PLD output pin on
the PSD Module. When driving this
“RESET_OUT” signal from a PLD output, the user
can choose to make it either active-high or active-
low logic, depending on the PLD equation.
External Reset Input Pin, RESET_IN
The RESET_IN pin can be connected directly to a
mechanical reset switch or other device which
pulls the signal to ground to invoke a reset.
RESET_IN is pulled up internally and enters a
Schmitt trigger input buffer with a voltage hystere-
sis of V_{RST_HYS} for immunity to the effects of slow
signal rise and fall times, as shown in Figure 20.
RESET_IN is also filtered to reject a voltage spike
less than a duration of t_{RST_FIL}. The RESET_IN
signal must be maintained at a logic '0' for at least
a duration of t_{RST_LO_IN} while the oscillator is run-
ning. The resulting MCU_RESET signal will last
only as long as the RESET_IN signal is active (it is
not stretched). Refer to the Supervisor AC specifi-
cations in Table 150., page 221 at the end of this
document for these parameter values.
Figure 20. Supervisor Reset Generation
VCC
RESET_IN
PIN
WDT
LVD
JTAG Debug
PULL-UP
Noise Filter
S
Q
DELAY,
tRST_ACTV
R
MCU
Clock
Sync
MCU_RESET
to MCU and
Peripherals
RESET
to PSD Module
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