UPSD33XX Datasheet, PDF (93/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
The UART1 serial channel can operate in one of
four different modes as shown in Table
44., page 81 in the section, SERIAL UART
INTERFACES, page 81. However, when UART1
is used for IrDA communication, UART1 must op-
erate in Mode 1 only, to be compatible with IrDA
protocol up to 115.2k bps. The IrDA interface will
support baud rates generated from Timer 1 or Tim-
er 2, just like standard UART serial communica-
tion, but with one restriction. The transmit baud
rate and receive baud rate must be the same (can-
not be different rates as is allowed by standard
UART communications).
The IrDA Interface is disabled after a reset and is
enabled by setting the IRDAEN Bit in the SFR
named IRDACON (Table 48., page 93). When
IrDA is disabled, the UART1's RxD and TxD sig-
nals will bypass the internal IrDA logic and instead
they are routed directly to the pins RxD1 and TxD1
respectively. When IrDA is enabled, the IrDA pulse
shaping logic is active and resides between
UART1 and the pins RxD1 and TxD1 as shown in
Figure 36., page 92.
Table 48. IRDACON Register Bit Definition (SFR CEh, Reset Value 0Fh)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
–
IRDAEN
PULSE
CDIV4
CDIV3
CDIV2
Details
Bit
Symbol
R/W
Definition
7
–
–
Reserved
IrDA Enable
Bit 1
CDIV1
Bit 0
CDIV0
6
IRDAEN
RW
0 = IrDA Interface is disabled
1 = IrDA is enabled, UART1 outputs are disconnected from Port 1 (or
Port 4)
IrDA Pulse Modulation Select
5
PULSE
RW
0 = 1.627µs
1 = 3/16 bit time pulses
4-0
CDIV[4:0]
RW
Specify Clock Divider (see Table 49., page 94)
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