UPSD33XX Datasheet, PDF (191/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Figure 78. Automatic Power Down (APD) Unit
8032 ADDR FROM MCU MODULE
8032 DATA FROM MCU MODULE
PMMR3, BIT 1 (FORCE_PD)
PMMR0, BIT 1 (APD EN)
8032 ALE
1 = FOUND
ENABLE _TRANSITION
TRANSITION
DETECTION
PSD MODULE RST_
CSI (pin PD2)
1 = FOUND
EDGE
EDGE
DETECTION
ENABLE
FULL
CLEAR _COUNT
4-BIT APD
UP-COUNTER
CLK
8032 ADDR
8032 DATA
PSD
MODULE
LINE
PDN
BUFFERS
ENABLE
1 = POWER
DOWN MODE
FSx
PDN
CSI
DPLD CHIP
SELECT
EQUATIONS
CSBOOTx
RS0
CSIOP
CLKIN (pin PD1)
WHEN CSI FUNCTION IS SPECIFIED IN PSDSOFT EXPRESS,
CSI IS PART OF EQUATIONS FOR FSx, CSBOOTx, RS0, and CSIOP
PDN
GPLD
OMC OUTPUTS
AI06608B
Figure 79. Power-Down Mode Flow Chart
RESET
Enable APD.
Set PMMR0,
Bit 1 = 1
OPTIONAL. Disable desired inputs to
PLDs by setting PMMR0 bits 4 and 5,
and PMMR2 bits 2 through 6
NO
ALE idle
for 15 CLKIN
clocks?
YES
PDN = 1, PSD
Module in Power-
Down Mode
AI09183
Chip Select Input (CSI). Pin PD2 of Port D can
optionally be configured in PSDsoft Express as the
PSD Module Chip Select Input, CSI, which is an
active-low logic input. By default, pin PD2 does not
have the CSI function.
When the CSI function is specified in PSDsoft Ex-
press, the CSI signal is automatically included in
DPLD chip select equations for FSx, CSBOOTx,
RS0, and CSIOP. When the CSI pin is driven to
logic ’0’ from an external device, all of these mem-
ories will be available for READ and WRITE oper-
ations. When CSI is driven to logic '1,' none of
these memories are available for selection, re-
gardless of the address activity from the 8032, re-
ducing power consumption. The state of the PLD
and port I/O pins are not changed when CSI goes
to logic ’1’ (disabled).
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