UPSD33XX Datasheet, PDF (41/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Table 16. Interrupt Summary
Interrupt
Source
Polling Vector
Priority Addr
Flag Bit Name
(SFR.bit position)
1 = Intr Pending
0 = No Interrupt
Reserved 0 (high) 0063h
–
External
Interrupt INT0
1
0003h
IE0 (TCON.1)
Timer 0
Overflow
2 000Bh TF0 (TCON.5)
External
Interrupt INT1
3
0013h
IE1 (TCON.3
Timer 1
Overflow
4 001Bh TF1 (TCON.7)
UART0
5
0023h
RI (SCON0.0)
TI (SCON0.1)
Timer 2
Overflow
or TX2 Pin
6
002Bh
TF2 (T2CON.7)
EXF2 (T2CON.6)
TEISF, RORISF,
SPI
7 0053h
TISF, RISF
(SPISTAT[3:0])
Reserved
8 0033h
–
I²C
9 0043h INTR (S1STA.5)
ADC
10 003Bh AINTF (ACON.7)
PCA
11
005Bh
OFVx, INTFx
(PCASTA[0:7])
UART1
12 (low) 004Bh
RI (SCON1.0)
TI (SCON1.1)
Flag Bit Auto-
Cleared
by Hardware?
Enable Bit Name
(SFR.bit position)
1 = Intr Enabled
0 = Intr Disabled
–
–
Edge - Yes
Level - No
EX0 (IE.0)
Yes
ET0 (IE.1)
Edge - Yes
Level - No
EX1 (IE.2)
Yes
ET1 (IE.3)
No
ES0 (IE.4)
No
ET2 (IE.5)
Yes
ESPI (IEA.6)
–
–
Yes
EI²C (IEA.1)
No
EADC (IEA.7)
No
EPCA (IEA.5)
No
ES1 (IEA.4)
Priority Bit Name
(SFR.bit position)
1= High Priority
0 = Low Priority
–
PX0 (IP.0)
PT0 (IP.1)
PX1 (IP.2)
PT1 (IP.3)
PS0 (IP.4)
PT2 (IP.5)
PSPI (IPA.6)
–
PI²C (IPA.1)
PADC (IPA.7)
PPCA (IPA.5)
PS1 (IPA.4)
41/231