UPSD33XX Datasheet, PDF (208/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Table 130. PSD Module DC Characteristics (with 5V V_DD)
Symbol
Parameter
Test Condition
(in addition to those in
Table 129., page 207)
V_IH Input High Voltage
4.5V < V_DD < 5.5V
V_IL Input Low Voltage
4.5V < V_DD < 5.5V
V_LKO
V_DD (min) for Flash Erase and
Program
V_OL Output Low Voltage
I_OL = 20uA, V_DD = 4.5V
I_OL = 8mA, V_DD = 4.5V
V_OH
Output High Voltage Except
V_STBY On
I_OH = –20uA, V_DD = 4.5V
I_OH = –2mA, V_DD = 4.5V
V_OH1 Output High Voltage V_STBY On
I_OH1 = 1uA
V_STBY SRAM Stand-by Voltage
I_STBY SRAM Stand-by Current
V_DD = 0V
I_IDLE Idle Current (V_STBY input)
V_DD > V_STBY
V_DF SRAM Data Retention Voltage
Only on V_STBY
I_SB
Stand-by Supply Current
for Power-down Mode
CSI > V_DD – 0.3V
(Notes 1,2)
I_LI
Input Leakage Current
V_SS < V_IN < V_DD
I_LO
Output Leakage Current
0.45 < V_OUT < V_DD
I_CC (DC)
(Note 4)
Operating
Supply
Current
PLD Only
Flash memory
PLD_TURBO = Off,
f = 0MHz (Note 4)
PLD_TURBO = On,
f = 0MHz
During Flash memory
WRITE/Erase Only
Read only, f = 0MHz
SRAM
f = 0MHz
PLD AC Adder
Min.
2
–0.5
2.5
4.4
2.4
V_STBY – 0.8
2.0
–0.1
2
–1
–10
Typ.
0.01
0.25
4.49
3.9
0.5
120
±0.1
±5
0
400
15
0
0
I_CC (AC) Flash memory AC Adder
1.5
(Note 4)
SRAM AC Adder
1.5
Note: 1. Internal Power-down mode is active.
2. PLD is in non-Turbo mode, and none of the inputs are switching.
3. Please see Figure 85., page 202 for the PLD current calculation.
4. IOUT = 0mA
Max.
Unit
V_DD +0.5
V
0.8
V
4.2
V
0.1
V
0.45
V
V
V
V
V_DD
V
1
uA
0.1
uA
V_DD – 0.2 V
250
uA
1
uA
10
uA
uA/PT
700 uA/PT
30
0
0
Note 3
2.5
3.0
mA
mA
mA
mA/
MHz
mA/
MHz
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