UPSD33XX Datasheet, PDF (57/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

Figure 19. MCU I/O Cell Block Diagram for Port 4
Enable_Push_Pull
Select_Alternate_Func
Digital_Alt_Func_Data_Out
P4.X SFR Read Latch
(for R-M-W instructions)
MCU_Reset
8032 Data Bus Bit
GPIO P4.X SFR
Write Latch
For PCA Alternate Function
DELAY,
1 MCU_CLK
PRE
D
Q
SFR
P4.X
Latch _Q
IN 1 ^SEL
MUX Y
IN 0
DELAY,
1 MCU_CLK
uPSD33xx
VCC
VCC
WEAK
PULL-UP, B
HIGH
SIDE
VCC
STONGER
PULL-UP, A
P4.X Pin
LOW
SIDE
P4.X SFR Read Pin
Digital_Pin_Data_In
AI09602
Table 25. P1: I/O Port 1 Register (SFR 90h, reset value FFh)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
Details
Bit
Symbol
R/W
Function⁽¹⁾
7
P1.7
R,W
Port pin 1.7
6
P1.6
R,W
Port pin 1.6
5
P1.5
R,W
Port pin 1.5
4
P1.4
R,W
Port pin 1.4
3
P1.3
R,W
Port pin 1.3
2
P1.2
R,W
Port pin 1.2
1
P1.1
R,W
Port pin 1.1
0
P1.0
R,W
Port pin 1.0
Note: 1. Write '1' or '0' for pin output. Read for pin input, but prior to READ, this bit must have been set to '1' by firmware or by a reset event.
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