UPSD33XX Datasheet, PDF (27/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
SFR
Addr
(hex)
SFR
Name
7
6
Bit Name and <Bit Address>
5
4
3
2
Reset Reg.
Value Descr.
1
0 _{(hex) with Link}
BD
TCMMODE
3
EINTF
E_COMP
CAP_PE
CAP_NE
MATCH TOGGLE
BE
TCMMODE
4
EINTF
E_COMP
CAP_PE
CAP_NE
MATCH TOGGLE
BF
TCMMODE
5
EINTF
E_COMP CAP_PE
CAP_NE MATCH TOGGLE
PWM[1:0]
PWM[1:0]
PWM[1:0]
00
Table
00 73., page
132
00
C0⁽¹⁾
P4
P4.7 P4.6
<C7h> <C6h>
P4.5
<C5h>
P4.4
<C4h>
P4.3
<C3h>
P4.2
<C2h>
P4.1 P4.0
<C1h> <C0h>
FF
Table
27., page
58
C1
CAPCOML
3
CAPCOML3[7:0]
00
C2
CAPCOMH
3
CAPCOMH3[7:0]
00
C3
CAPCOML
4
C4
CAPCOMH
4
CAPCOML4[7:0]
CAPCOMH4[7:0]
00
Table
00
67., page
124
C5
CAPCOML
5
CAPCOML5[7:0]
00
C6
CAPCOMH
5
CAPCOMH5[7:0]
00
C7 PWMF1
PWMF1[7:0]
00
C8^{(1) T2CON}
TF2 EXF2
<CFh> <CEh>
RCLK
<CDh>
TCLK
<CCh>
EXEN2
<CBh>
TR2
<CAh>
C/T2
<C9h>
CP/
RL2
<C8h>
00
Table
41., page
75
C9
RESERVED
CA RCAP2L
CB RCAP2H
CC
TL2
CD
TH2
RCAP2L[7:0]
RCAP2H[7:0]
TL2[7:0]
TH2[7:0]
00
Standard
00
Timer
00 ^{SFRs, pag}
e 69
00
CE IRDACON
Table
– IRDA_EN BIT_PULS CDIV4 CDIV3 CDIV2 CDIV1 CDIV0 0F 48., page
93
D0^{(1) PSW}
CY
AC
F0
<D7h> <D6h> <D5h>
RS[1:0]
<D4h, D3h>
OV
<D2h>
Program
–
P
<D0>
Status
00 Word
(PSW), pa
ge 22
D1
RESERVED
D2 SPICLKD
SPICLKD[5:0]
Table
–
–
04 61., page
118
D3 SPISTAT
–
–
Table
–
BUSY TEISF RORISF TISF RISF 02 62., page
119
27/231