UPSD33XX Datasheet, PDF (106/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Table 56. Number of I²C Bus Samples Taken after 1-to-0 Transition on SDA (START Condition)
Contents of S1SETUP
SS_EN bit
SMPL_SET[6:0]
Resulting value for S1SETUP
Resulting Number of Samples
Taken After 1-to-0 on SDA Line
0
XXXXXXXb
00h (default)
1
1
0000000b
80h
1
1
0000001b
81h
2
1
0000010b
82h
3
...
...
...
...
1
0001011b
8Bh
12
1
0010111b
97h
24
...
...
...
...
1
1111111b
FFh
128
Table 57. Start Condition Hold Time
I²C Bus Speed
Range of I²C Clock Speed (f_SCL)
Standard
Up to 100KHz
Fast
101KHz to
400KHz
High
401KHz to 833KHz⁽¹⁾
Note: 1. 833KHz is maximum for uPSD33xx devices.
Minimum START Condition Hold
Time (t_HLDSTA)
4000ns
600ns
160ns
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