UPSD33XX Datasheet, PDF (173/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Table 101. MCU I/O Mode Port C Data Out Register (address = csiop + offset 12h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PC7
N/A
N/A
PC4
PC3
PC2
N/A
Note: 1. For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’
2. Default state of register is 00h after reset or power-up
Table 102. MCU I/O Mode Port D Data Out Register (address = csiop + offset 13h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
N/A
N/A
N/A
N/A
N/A
PD2⁽³⁾
PD1
Note: 1. For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’
2. Default state for register is 00h after reset or power-up
3. Not available on 52-pin uPSD33xx devices
Table 103. MCU I/O Mode Port A Direction Register⁽¹⁾ (address = csiop + offset 06h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PA7
PA6
PA5
PA4
PA3
PA2
PA1
Note: 1. Port A not available on 52-pin uPSD33xx devices
2. For each bit, 1 = out from uPSD33xx port pin1, 0 = in to PSD33xx port pin
3. Default state for register is 00h after reset or power-up
Table 104. MCU I/O Mode Port B Direction In Register (address = csiop + offset 07h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PB7
PB6
PB5
PB4
PB3
PB2
PB1
Note: 1. For each bit, 1 = out from uPSD33xx port pin1, 0 = in to PSD33xx port pin
2. Default state for register is 00h after reset or power-up
Table 105. MCU I/O Mode Port C Direction Register (address = csiop + offset 14h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
PC7
N/A
N/A
PC4
PC3
PC2
N/A
Note: 1. For each bit, 1 = out from uPSD33xx port pin1, 0 = in to PSD33xx port pin
2. Default state for register is 00h after reset or power-up
Table 106. MCU I/O Mode Port D Direction Register (address = csiop + offset 15h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
N/A
N/A
N/A
N/A
N/A
PD2⁽³⁾
PD1
Note: 1. For each bit, 1 = out from uPSD33xx port pin1, 0 = in to PSD33xx port pin
2. Default state for register is 00h after reset or power-up
3. Not available on 52-pin uPSD33xx devices
Bit 0
N/A
Bit 0
N/A
Bit 0
PA0
Bit 0
PB0
Bit 0
N/A
Bit 0
N/A
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