UPSD33XX Datasheet, PDF (50/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Table 24. PCON: Power Control Register (SFR 87h, reset value 00h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SMOD0
SMOD1
–
POR
RCLK1
TCLK1
PD
IDL
Details
Bit
Symbol
R/W
Function
Baud Rate Double Bit (UART0)
7
SMOD0
R,W
0 = No Doubling
1 = Doubling
(See UART Baud Rates, page 84 for details.)
Baud Rate Double Bit for 2nd UART (UART1)
6
SMOD1
R,W
0 = No Doubling
1 = Doubling
(See UART Baud Rates, page 84 for details.)
5
–
–
Reserved
Only a power-on reset sets this bit (cold reset). Warm reset will not set
this bit.
4
POR
R,W
'0,' Cleared to zero with firmware
'1,' Is set only by a power-on reset generated by Supervisory circuit (see
Power-up Reset, page 66 for details).
3
RCLK1
R,W
Received Clock Flag (UART1)
(See Table 41., page 75 for flag description.)
2
TCLK1
R,W
Transmit Clock Flag (UART1)
(See Table 41., page 75 for flag description)
Activate Power-down Mode
1
PD
R,W
0 = Not in Power-down Mode
1 = Enter Power-down Mode
Activate Idle Mode
0
IDL
R,W
0 = Not in Idle Mode
1 = Enter Idle Mode
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