UPSD33XX Datasheet, PDF (209/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Table 131. PSD Module DC Characteristics (with 3.3V V_DD)
Symbol
Parameter
Test Condition
(in addition to those in
Table 129., page 207)
V_IH High Level Input Voltage
3.0V < V_DD < 3.6V
V_IL Low Level Input Voltage
3.0V < V_DD < 3.6V
V_LKO
V_DD (min) for Flash Erase and
Program
V_OL Output Low Voltage
I_OL = 20uA, V_DD = 3.0V
I_OL = 4mA, V_DD = 3.0V
V_OH
Output High Voltage Except
V_STBY On
I_OH = –20uA, V_DD = 3.0V
I_OH = –1mA, V_DD = 3.0V
V_OH1 Output High Voltage V_STBY On
I_OH1 = 1uA
V_STBY SRAM Stand-by Voltage
I_STBY SRAM Stand-by Current
V_DD = 0V
I_IDLE Idle Current (V_STBY input)
V_DD > V_STBY
V_DF SRAM Data Retention Voltage
Only on V_STBY
I_SB
Stand-by Supply Current
for Power-down Mode
CSI > V_DD – 0.3V
(Notes 1,2)
I_LI Input Leakage Current
V_SS < V_IN < V_DD
I_LO Output Leakage Current
0.45 < V_IN < V_DD
I_CC (DC)
(Note 4)
Operating
Supply
Current
PLD Only
Flash memory
PLD_TURBO = Off,
f = 0MHz (Note 2)
PLD_TURBO = On,
f = 0MHz
During Flash memory
WRITE/Erase Only
Read only, f = 0MHz
SRAM
f = 0MHz
PLD AC Adder
I_CC (AC) Flash memory AC Adder
(Note 4)
SRAM AC Adder
Note: 1. Internal PD is active.
2. PLD is in non-Turbo mode, and none of the inputs are switching.
3. Please see Figure 86., page 202 for the PLD current calculation.
4. I_OUT = 0mA
Min.
Typ.
0.7V_DD
–0.5
1.5
2.9
2.7
V_STBY – 0.8
2.0
–0.1
2
0.01
0.15
2.99
2.8
0.5
50
–1
±0.1
–10
±5
0
200
10
0
0
Note 3
1.0
0.8
Max.
Unit
V_DD +0.5
V
0.8
V
2.2
V
0.1
V
0.45
V
V
V
V
V_DD
V
1
uA
0.1
uA
V_DD – 0.2 V
100
uA
1
uA
10
uA
uA/PT
400 uA/PT
25
mA
0
mA
0
mA
1.5
mA/
MHz
1.5
mA/
MHz
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