UPSD33XX Datasheet, PDF (169/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Figure 69. Detail of a Single I/O Port (typical of Ports A, B, C)
FROM AND-OR ARRAY
FROM PLD INPUT BUS
FROM OMC
ALLOCATOR
PT OUTPUT ENABLE (.OE)
PSD MODULE RESET
Q ^DIRECTION
CSIOP
REGIS-
TERS
8032
DATA
Q ^DRIVE
BITS _D
8032
WR
Q ^CONTROL
(MCUI/O)
Q ^{DATA OUT}
CLR
RESET
LATCHED ADDR BIT, PORT A or B
D BIT, PERIPH I/O MODE, Port A
8032
DATA
BIT
1
P
D²
B₃
M4
U
X⁵
6
DIRECTION
DRIVE SELECT
CONTROL
DATA OUT (MCUI/O)
ENABLE OUT
DATA IN (MCUI/O)
8032 RD
ONE of 6
CSIOP
REGISTERS
FROM OMC OUTPUT
WR RD PIO EN PSELx
I/O PORT
LOGIC
PERIPHERAL I/O
MODE SETS
DIRECTION
(PORT A ONLY)
DRIVE TYPE
PSDsoft
OUTPUT
SELECT
OE
MUX
OUTPUT ENABLE
1
O
U
T
P
U
2T
3_M
4^U
X
OUTPUT
DRIVER
TYPICAL
PIN
PORT A, B, C
PERIPH I/O
DATA BIT
INPUT
BUFFER
TO IMC
AI07873A
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