UPSD33XX Datasheet, PDF (81/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
SERIAL UART INTERFACES
uPSD33xx devices provide two standard 8032
UART serial ports.
– The first port, UART0, is connected to pins
RxD0 (P3.0) and TxD0 (P3.1)
– The second port, UART1 is connected to pins
RxD1 (P1.2) and TxD1 (P1.3). UART1 can
optionally be routed to pins P4.2 and P4.3 as
described in Alternate Functions, page 59.
The operation of the two serial ports are the same
and are controlled by two SFRs:
■ SCON0 (Table 45., page 82) for UART0
■ SCON1 (Table 46., page 83) for UART1
Each UART has its own data buffer accessed
through an SFR listed below:
■ SBUF0 for UART0, address 99h
■ SBUF1 for UART1, address D9h
When writing SBU0 or SBUF1, the data automati-
cally loads into the associated UART transmit data
register. When reading this SFR, data comes from
a different physical register, which is the receive
register of the associated UART.
Note: For simplicity in the remaining UART dis-
cussions, the suffix “0” or “1” will be dropped when
referring to SFR registers and bits related to
UART0 or UART1, since each UART interface has
identical operation. Example, SBUF0 and SBUF1
will be referred to as just SBUF.
Each UART serial port can be full-duplex, meaning
it can transmit and receive simultaneously. Each
UART is also receive-buffered, meaning it can
commence reception of a second byte before a
previously received byte has been read from the
SBUF Register. However, if the first byte still has
not been read by the time reception of the second
byte is complete, one of the bytes will be lost.
UART Operation Modes
Each UART can operate in one of four modes, one
mode is synchronous, and the others are asyn-
chronous as shown in Table 44.
Mode 0. Mode 0 provides asynchronous, half-du-
plex operation. Serial data is both transmitted, and
received on the RxD pin. The TxD pin outputs a
shift clock for both transmit and receive directions,
thus the MCU must be the master. Eight bits are
transmitted/received LSB first. The baud rate is
fixed at 1/12 of f_OSC.
Mode 1. Mode 1 provides standard asynchro-
nous, full-duplex communication using a total of 10
bits per data byte. Data is transmitted through TxD
and received through RxD with: a Start Bit (logic
'0'), eight data bits (LSB first), and a Stop Bit (logic
'1'). Upon receive, the eight data bits go into the
SFR SBUF, and the Stop Bit goes into bit RB8 of
the SFR SCON. The baud rate is variable and de-
rived from overflows of Timer 1 or Timer 2.
Mode 2. Mode 2 provides asynchronous, full-du-
plex communication using a total of 11 bits per
data byte. Data is transmitted through TxD and re-
ceived through RxD with: a Start Bit (logic '0');
eight data bits (LSB first); a programmable 9th
data bit; and a Stop Bit (logic '1'). Upon Transmit,
the 9th data bit (from bit TB8 in SCON) can be as-
signed the value of '0' or '1.' Or, for example, the
Parity Bit (P, in the PSW) could be moved into
TB8. Upon receive, the 9th data bit goes into RB8
in SCON, while the Stop Bit is ignored. The baud
rate is programmable to either 1/32 or 1/64 of
f_OSC.
Mode 3. Mode 3 is the same as Mode 2 in all re-
spects except the baud rate is variable like it is in
Mode 1.
In all four modes, transmission is initiated by any
instruction that uses SBUF as a destination regis-
ter. Reception is initiated in Mode 0 by the condi-
tion RI = 0 and REN = 1. Reception is initiated in
the other modes by the incoming Start Bit if
REN = 1.
Table 44. UART Operating Modes
Mode Synchronization
Bits of SFR,
SCON
SM0 SM1
0
Synchronous
0
0
1
Asynchronous
0
1
2
Asynchronous
1
0
3
Asynchronous
1
1
Baud Clock
Data
Bits
f_OSC/12
8
Timer 1 or Timer 2 Overflow 8
f_OSC/32 or f_OSC/64
9
Timer 1 or Timer 2 Overflow 9
Start/Stop Bits See Figure
None
1 Start, 1 Stop
1 Start, 1 Stop
1 Start, 1 Stop
Figure
28., page 86
Figure
30., page 88
Figure
32., page 90
Figure
34., page 91
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