UPSD33XX Datasheet, PDF (107/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Table 58 provides recommended settings for
S1SETUP based on various combinations of f_OSC
and f_SCL. Note that the “Total Sample Period”
times in Table 57., page 106 are typically slightly
less than the minimum START condition hold time,
t_HLDSTA for a given I²C bus speed.
Important: The SCL bit rate f_SCL must first be de-
termined by bits CR[2:0] in the SFR S1CON be-
fore a value is chosen for SMPL_SET[6:0] in the
SFR S1SETUP.
Table 58. S1SETUP Examples for Various I²C Bus Speeds and Oscillator Frequencies
I²C Bus
Speed,
f_SCL
Parameter
6 MHz
Oscillator Frequency, f_OSC
12 MHz
24 MHz
33 MHz
40 MHz
Recommended
S1SETUP Value
93h
A7h
CFh
EEh
FFh
Standard ^{Number of Samples}
Time Between Samples
20
166.6ns
40
83.3ns
80
41.6ns
111
30ns
128
25ns
Total Sampled Period
3332ns
3332ns
3332ns
3333ns
3200ns
Recommended
S1SETUP Value
82h
85h
8Bh
90h
93h
Fast ^{Number of Samples}
Time Between Samples
3
166.6ns
6
83.3ns
12
41.6ns
17
30ns
20
25ns
Total Sampled Period
500ns
500ns
500ns
510ns
500ns
Recommended
S1SETUP Value
(Note 1)
80
82
83
84
High ^{Number of Samples}
-
Time Between Samples
-
1
83.3ns
3
41.6ns
4
30ns
5
25ns
Total Sampled Period
-
Note: 1. Not compatible with High Speed I²C.
83.3
125ns
120ns
125ns
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