UPSD33XX Datasheet, PDF (26/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
SFR
Addr
(hex)
SFR
Name
7
6
Bit Name and <Bit Address>
5
4
3
2
Reset Reg.
Value Descr.
1
0 _{(hex) with Link}
A8⁽¹⁾
IE
EA
<AFh>
–
ET2
<ADh>
ES0
<ACh>
ET1
<ABh>
EX1
<AAh>
ET0 EX0
<A9h> <A8h>
00
Table
17., page
43
A9
TCMMODE
0
EINTF
E_COMP CAP_PE
CAP_NE MATCH TOGGLE
AA
TCMMODE
1
EINTF
E_COMP
CAP_PE
CAP_NE
MATCH TOGGLE
AB
TCMMODE
2
EINTF
E_COMP
CAP_PE
CAP_NE
MATCH TOGGLE
PWM[1:0]
PWM[1:0]
PWM[1:0]
00
Table
00 73., page
132
00
AC
CAPCOML
0
AD
CAPCOMH
0
CAPCOML0[7:0]
CAPCOMH0[7:0]
00
Table
67., page
00
124
AE WDTKEY
WDTKEY[7:0]
Table
55 37., page
68
AF
CAPCOML
1
CAPCOML1[7:0]
Table
00 67., page
124
B0⁽¹⁾
P3
P3.7 P3.6
<B7h> <B6h>
P3.5
<B5h>
P3.4
<B4h>
P3.3
<B3h>
P3.2
<B2h>
P3.1 P3.0
<B1h> <B0h>
FF
Table
26., page
58
B1
CAPCOMH
1
CAPCOMH1[7:0]
00
B2
CAPCOML
2
B3
CAPCOMH
2
CAPCOML2[7:0]
CAPCOMH2[7:0]
00
Table
67., page
124
00
B4 PWMF0
PWMF0[7:0]
00
B5
RESERVED
B6
RESERVED
B7
IPA
PADC PSPI PPCA
PS1
–
Table
–
PI2C –
00 20., page
45
B8⁽¹⁾
IP
–
–
PT2
<BDh>
PS0
<BCh>
PT1
<BBh>
PX1
<BAh>
PT0 PX0
<B9h> <B8h>
00
Table
19., page
44
B9
RESERVED
BA PCACL1
BB PCACH1
PCACL1[7:0]
PCACH1[7:0]
00 Table
67., page
00
124
BC PCACON1 – EN_PCA EOVF1 PCA_IDL –
Table
–
CLK_SEL[1:0] 00 71., page
130
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