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UPSD33XX Datasheet, PDF (198/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic
uPSD33xx
Figure 82. Recommended 6-pin JTAG Connections
CIRCUIT
BOARD
100k typical
uPSD33XX
TMS - PC0
TCK - PC1
SRAM STBY or I/O - PC2
TSTAT - PC3
TERR - PC4
TDI - PC5
TDO - PC6
GENERAL I/O - PC7
RESETIN
GENERAL I/O
SIGNALS
0.01
µF
10k
JTAG
CONN.
TMS
TCK
TSTAT
TERR
TDI
TDO
VCC(1,2)
JTAG
Programming
or Test
Equipment
Connects Here
GND
RST(3)
DEBUG
100k
PUSH BUTTON
or ANY OTHER
RESET SOURCE
OPTIONAL
TEST POINT
AI09186
Note: 1. For 5V uPSD33xx devices, pull-up resistors and VCC pin on the JTAG connector should be connected to 5V system VDD.
2. For 3.3V uPSD33xx devices, pull-up resistors and VCC pin on the JTAG connector should be connected to 3.3V system VCC.
3. This signal is driven by an Open-Drain output in the JTAG equipment, allowing more than one source to activate RESET_IN.
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