UPSD33XX Datasheet, PDF (111/231 Pages) STMicroelectronics – Fast 8032 MCU with Programmable Logic

uPSD33xx
Else If mode is Slave-Receiver:
Is this Intr from SIOE detecting a
STOP on bus?
If Yes, a STOP was detected:
– recv_buf[buffer_index] = S1DAT,
get last byte
– Exit ISR, Master has sent last byte
If No, a STOP was not detected,
continue:
Determine if this Interrupt is from
receiving an address or a data byte
from a Master.
Is (S1CON.ADDR = 1 and S1CON.AA =1)?
If No, intr is from receiving
data, goto C:
If Yes, intr is from an address,
continue:
– slave_is_adressed = 1, local vari-
able set true
<indicates Master selected this
slave>
– S1CON.ADDR = 0, clear address
match flag
Determine if R/W bit indicates trans-
mit or receive.
Does status.TX_MODE = 1?
If Yes, Master wants transmit
mode
– Exit ISR, indicate Master wants
Slv-Xmit mode
If No, Master wants Slave-Recv
mode
– dummy = S1DAT, read to release bus
– Exit ISR, ready to recv data on
next interrupt
C: (Interrupt is from Slv receiving
data from Mastr)
– recv_buf[buffer_index] = S1DAT,
read byte
– Exit ISR, recv next byte on next
interrupt
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