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GDC21D601 Datasheet, PDF (94/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU
GDC21D601
5. Real Time Clock Memory Map
The base address of the RTC is fixed as 0xFFFF F300 and the offset of any particular register from the base
address is fixed.
ADDRESS
RTC Base + 0x00
RTC Base + 0x04
RTC Base + 0x08
RTC Base + 0x0C
RTC Base + 0x10
RTC Base + 0x14
RTC Base + 0x18
RTC Base + 0x1C
Table 2. RTC Memory Map
READ LOCATION
RTC data register (RTCDR)
RTC match register (RTCMR)
RTC status (RTCS)
RTC clock divider (RTCDV)
RTC control register (RTCCR)
WRITE LOCATION
RTC data register (RTCDR)
RTC match register (RTCMR)
RTC clock divider (RTCDV)
RTC control register (RTCCR)
RTC Tic selection register (RTCTS)
TicCLK32K
TicCLKPCLK
Note The RTC clock divider register may only be written to when in test mode.
6. Real Time Clock Register Descriptions
The following user registers are provided :
RTC Data Register (RTCDR)
Read/Write. Writing to this 32-bit register will load the counter. A read will give the current value of the
counter.
RTC Match Register (RTCMR)
Read/Write. Writing to this 32-bit register will load the match register. This value can also be read back.
RTC Status Register (RTCS)
Read-only. When performing a read from this location the interrupt flag will be cleared. If a match event occurs,
bit[1] will be set. For a second event, bit[0] will be set. This register is affected by the control register.
RTC Clock Divider (RTCDV)
Read/Write. The reads to the register will return only four bits of the clock divider output. Bits [3:0] will return
bits (14, 11, 7, 3) of the divider output. Writing zero to bit[0] clears this divider.
RTC Control Register (RTCCR)
Read/Write. This register enables the interrupt. Bit[1] enables the match event interrupt (default disable = 0).
Bit[0] enables second event interrupt (default disable = 0).
RTC Tic Selection (RTCTS)
Write-only. This register is for production test purposes. Bit[0] enables TicCLK32K for 32kHz clock
replacement. Bit[1] enables TicCLKPCLK for PCLK clock replacement.
TicCLK32K
Write-only. This generates 32kHz clock for production test purposes.
TicCLKPCLK
Write-only. This generates PCLK clock for production test purposes.
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