GDC21D601 Datasheet, PDF (21/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
5. Memory Format
The ARM720T CPU Core supports both the Big-Endian and Little-Endian format. And the GDC21D601 can also
support the Big-Endian and Little-Endian memory format. The GDC21D601 can support the Little-Endian Format
by default. When using the GDC21D601 as Big-Endian format: 1) set Boot Mode 2 pin to VDD, and 2) set the
ARM720T as Big-Endian mode with using Coprocessor instruction. 3) set the Big-Endian flag of the compile
options when compile. The example of the coprocessor instruction is in the below. It is noted that CP15 register
(CPU control register) can only be accessed with MRC and MCR instructions in a Privileged mode. See the
ARM720T Data Sheet (ARM DDI 0087D) for detail. The ARM720T Data Sheet is downloadable from ARM
home page (http://www.arm.com).
For example :
MRC p15, 0, r3, c1, c1
ORR r3, r3, #0x80
MCR p15, 0, r3, c1, c1
Note : The GDC21D601 has a EBI (External Bus Interface) block which can copy the Byte or Half-
Word of the lower position in data bus to higher data bus position, so you can use the GDC21D601 as
BigEnd mode by only set the Boot Mode 2 pin to VDD and in this case you may not set the ARM720T
as BigEnd Mode.
6. Boot Mode
The GDC21D601 can support 32/16/8 Bit Boot ROM. By default MCU can boot from 32 bit ROM. In this case
Boot Mode[1:0] (pin number 116 and 117) are “00”. If you want use 16 bit Boot ROM, then you must set Boot
Mode[1:0] are “10”. And in case of Booting from 8 bit ROM, you must set Boot Mode[1:0] are “01”. It is for
reserved in case that Boot Mode[1:0] are “11” . See the Table 1. The Description of the Mode Pin.
In all case of boot mode the wait cycle of Boot area is 3 cycles. If you want to know about boot mode for detail
you must see the Section 6. Static Memory Controller.
Table 1. The Description of the Mode Pin
Mode[1:0]
00
01
10
11
Bus width of Booting ROM
32 Bit
8 Bit
16 Bit
Reserved
22