GDC21D601 Datasheet, PDF (73/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
5. Watchdog Timer Memory Map
The WDT has five registers. They are used to select the internal clock source, switch to the WDT mode, control the
reset signal, and test it. The base address of the watchdog timer is fixed to 0xFFFF F100 and the offset of any
particular register from the base address is fixed.
Table 3. Memory Map of the Watchdog Timer APB Peripheral
ADDRESS
WdtBase + 0x00
WdtBase + 0x04
WdtBase + 0x08
WdtBase + 0x10
WdtBase + 0x14
READ LOCATION
Timer/Reset Control
Reset Status
Timer Counter
Test Output
WRITE LOCATION
Timer/Reset Control
Timer Counter
Test Input
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