GDC21D601 Datasheet, PDF (176/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

PMU Registers (@0xFFFF F000)
ABBREVIATION ADDRESS
PMUCR
0xFFFFF000
BCLKCR
0xFFFFF004
GDC21D601
DESCRIPTIONS
PMU Control Register
Only following values are effective.
0x00 := Clear PMU status register
0x03 := Enters the Power Down mode
PMU Status Register
Bit 7-6: Reserved
Bit 5-4: Previous Reset Status
00 : Power-On Reset status
01 : S/W Reset state by PMU
10 : S/W Manual Reset by WDT
11 : WD overflow Reset state by WDT
Bit 3-2: Current status flag bits
00 : Running state after nPOR
01 : Running state after WD_OF
10 : Running state after Man_Reset
11 : Reserved
Bit 1-0: Previous status flag bits
00 : Start state after nPOR
01 : Start state after WD_OF
10 : Start state after Man_Reset
11 : Start state after PD mode
BCLK frequency selection and BUS mode
control(Standard / Fast BUS mode)
Bit 7-4: Reserved
Bit 3: FCLK control bit
0 – Fast-bus mode (not use the FCLK)
1 – Standard-bus mode
Use FCLK as SYS_CLK
Bit 2-0: BCLK selection bits
000 : BCLK = SYS_CLK / 2
001 : BCLK = SYS_CLK / 4
010 : BCLK = SYS_CLK / 8
011 : BCLK = SYS_CLK / 16
100 : BCLK = SYS_CLK / 32
101 : BCLK = SYS_CLK / 64
110 : BCLK = SYS_CLK / 128
111 : BCLK = SYS_CLK.
R/W INITIAL VALUE
W
8h’00
R
R/W
8h’00
177