GDC21D601 Datasheet, PDF (80/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

Section 10. Interrupt Controller
1. General Description
The interrupt controller has the following features :
• Asynchronous interrupt controller
• Six external interrupts
• Nineteen internal interrupts
• Low interrupt latency
• Selection of the active modes of all interrupt source inputs (Level or Edge trigger)
• Maskable for each interrupt source and output signal
• Selection of the output paths (IRQ or FIQ for each interrupt source)
GDC21D601
IRQ [25:0]
Control Block
0
M ask Register
1 Trigger M ode Register
2 _{Trigger Polarity R egister}
3
D irection Register
4
FIQ status Register
5
IRQ status Register
6
FIQ M ask Register
7
IRQ M ask Register
8
Status clear Register
Bus
Interface
nIR Q
nFIQ
Internal
Data Bus
Figure 1. Interrupt Controller Module Block Diagram
81