GDC21D601 Datasheet, PDF (145/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
5. Programmer’ s Model
Smart Card Interface Mode Control Register (SMCR)
SMCR is a 3-bit readable/writable register, in which is used to control the pure smart card interface part except
uart and APB interface. All the bits in this register are initialized to 0 at reset.
Table 3. SMCR Bit Functions
BIT
NAME
0
MDSEL
1
SMCLKEN
2
SMPEDEN
FUNCTION
Mode Select
0 : UART (initial value)
1 : Smart card I/F
Smart card Clock Enable
0 : Disable(initial value)
1 : Enable
Parity Error Detect Enable
0 : Disable(initial value)
1 : Enable
Smart Card Clock Devisior Latch (SMDLL)
Smart Card Clock Devisior Latch (SMDLM)
The smart card interface has a programmable clock generator for smart card that uses the external clock. SMDLL
and SMDLM are two 8-bit latchs, in which is used to store in a 16-bit binary format. All the bits in this registers
are initialized to 0 at reset.
BIT
NAME
7:0
devisior (LS)
Table 4. SMDLL Bit Functions
Divisor for SMCLK
FUNCTION
BIT
NAME
7:0
devisior (MS)
Table 5. SMDLM Bit Functions
Divisor for SMCLK
FUNCTION
Smart Card Interface Status Register (SMSR)
SMSR is a 1-bit read-only register which is used to indicate whether partty error is detected or not. It is cleared
after reading it.
BIT
NAME
0
SMPEDI
Table 6. SMSR Bit Functions
FUNCTION
Parity error
0 : No interrupt occurrenrce (initial value)
1 : Interrupt occurrerce
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