GDC21D601 Datasheet, PDF (104/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
Timer PWM Mode Register (TPWMR)
Eight-bit readable and writable registers that select the PWM mode for each channel.
BIT
7 (reserved)
6 (reserved)
5 (PWM5)
4 (PWM4)
3 (PWM3)
2 (PWM2)
1 (PWM1)
0 (PWM0)
INITIAL
VALUE
1
1
0
0
0
0
0
0
Table 5. TPWMR Bit Description
0 = operate normally
1 = operate in PWM mode
FUNCTION
select the PWM mode
Timer Control Register (TCONTR)
Eight-bit readable and writable register for each channel that selects the timer counter clock source, the edges of
the external clock source, and the counter clear source.
BIT
7 (reserved)
6 (CCLR1)
5 (CCLR0)
4 (reserved)
3 (reserved)
2 (TPSC2)
1 (TPSC1)
0 (TPSC0)
INITIAL
VALUE
1
0
0
1
1
0
0
0
Table 6. TCONTR Bit Description
00 = not cleared - Free running mode
01 = cleared by GRA compare match or input
capture - Periodic mode
10 = cleared by GRB compare match or input
capture - Periodic mode
11 = cleared in synchronization with other sync.
timer
000 = internal clock 1 (BCLK/2)
001 = internal clock 2 (/4)
010 = internal clock 3 (/16)
011 = internal clock 4 (/64)
100 = external clock 1 (Ext_clk1)
101 = external clock 2 (Ext_clk2)
110 = external clock 3 (Ext_clk3)
111 = external clock 4 (Ext_clk4)
FUNCTION
Select the counter clear source
select the counter clock source
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