GDC21D601 Datasheet, PDF (93/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
4. Functional Description
The counter is loaded by writing it to the RTC data register. The counter will count up on each rising edge of the
clock and loops back with 0 when the maximum value (0xFFFFFFFF) is reached. At any moment the counter
value can be obtained by reading the RTC data register.
The value of the match register can also be read at any time, and the read does not affect the counter value. The
status of the interrupt signal is available in the status register. The status bit is set if a comparator match event has
occurred or 1 second has elapsed. Reading from the status register will clear the status register.
Data In
RTC
APB
registers
RTC
Counter
Module core
RTCIRQ
A
P
Data Out
B
32-bit
comparator
Match
B
register
u
s
PCLK
Sync
Control
1Hz
Ripple
Counter
CLK32K
Figure 4. RTC Block Diagram
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