English
Language : 

GDC21D601 Datasheet, PDF (138/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU
GDC21D601
MODEM Status Register
This register provides the current state of the control lines from the MODEM (or peripheral device) to the CPU. In
addition to this current-state information, four bits of the MODEM Status Register provide change information.
These bits are set to a logic 1 whenever a control input from the MODEM changes its state. They are reset to logic
0 whenever the CPU reads the MODEM Status Register.
The contents of the MODEM Status Register are indicated in Table 5. Summary of Registers, and are described
below.
Bit 0 :
This bit is the Delta Clear to Send (DCTS) indicator. Bit 0 indicates that the NCTS input to the chip
has changed its state since the last time it was read by the CPU.
Bit 1 :
This bit is the Delta Data Set Ready (DDSR) indicator. Bit 1 indicates that the NDSR input to the chip
has changed its state since the last time it was read by the CPU.
Bit 2 :
This bit is the Trailing Edge of Ring Indicator (TERI) detector. Bit 2 indicates that the NRI input to the
chip has changed from a low to a high state.
Bit 3 :
This bit is the Delta Data Carrier Detect (DDCD) indicator. Bit 3 indicates that the NDCD input to the
chip has changed its state since the last time it was read by the CPU.
** Note : Whenever bit 0, 1, 2 or 3 is set to logic 1, a MODEM Status Interrupt is generated.
Bit 4 :
This bit is the complement of the Clear to Send (NCTS) input. If bit 4 (loop) of the MCR is set to a 1,
this bit is equivalent to RTS in the MCR.
Bit 5 :
This bit is the complement of the Data Set Ready (NDSR) input. If bit 4 of the MCR is set to 1, this bit
is equivalent to DTR in the MCR.
Bit 6 :
This bit is the complement of the Ring Indicator (NRI) input. If bit 4 of the MCR is set to 1, this bit is
equivalent to OUT1 in the MCR.
Bit 7 :
This bit is the complement of the Data Carrier Detect (NDCD) input. If bit 4 of the MCR is set to 1,
this bit is equivalent to OUT2 in the MCR.
Scratch Register
This 8-bit Read/Write Register does not control the UART in any way. It is intended to be used as a scratchpad
register by the programmer to hold data temporarily.
139