GDC21D601 Datasheet, PDF (156/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
Section 18. Direct Memory Access Controller
1. General Description
This chip includes a 2-channel direct memory access controller (DMAC). The DMAC can be used in place of the
CPU to perform high speed data transfers among external devices equipped;, external memories, memory-mapped
external devices. Using the DMAC reduces the burden on the CPU and increases operating efficiency of the MCU.
The features of the DMA Controller are listed below :
• Two Channels with identical function
• Four Gigabytes of address space
• Max. 256 Kbytes transfer
• Data Transfer unit : Byte, Half-word, Word
• Bus mode : Burst mode, Exception mode (Cycle steal mode)
• Two kinds of address modes
- Single address mode
- Dual address mode
• Two types of Transfer request sources
- External I/O request
- Auto request
• Two kinds of fixed priorities for channels
- Channel 1’s priority > Channel 0’s priority
- Channel 0’s priority > Channel 1’s priority
• CPU can be interrupted when the specified number of data transfers are completed.
BnRES
BCLK
AREQ
AGNT
TRendINT
nDMAReq[1:0]
nDMAck[1:0]
BWAIT
BEROR
BLAST
DMAtrans
DMA Controller
ASB Interface
Registers
Control Block
BPROT[1:0]
BTRAN[1:0]
BSIZE[1:0]
BLOK
BA[31:0]
BD[31:]
BWRITE
DSEL
Figure 1. DMAC Top Block Diagram
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