GDC21D601 Datasheet, PDF (132/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
Programmable Baud Generator
The UART contains a programmable Baud Generator that is capable of taking any clock input from DC to 8.0
MHz and dividing it by any divisor from 2 to 65535. 4MHz is the highest input clock frequency recommended
when the divisor=1. The output frequency of the Baud Generator is 16 x the Baud [divisor # = (frequency input) /
(baud rate x 16)]. Two 8-bit latches store the divisor in a 16-bit binary format. These Divisor Latches must be
loaded during initialization to ensure the proper operation of the Baud Generator. Upon loading either of the
Divisor Latches, a 16-bit Baud counter is immediately loaded.
Table 7. Baud rates provide decimal divisors to use with crystal frequencies of 1.8432 MHz and 3.6864 MHz. For
baud rates of 38400 and below, the error obtained is minimal. The accuracy of the desired baud rate depends on
the chosen crystal frequency. Using a divisor of zero is not recommended.
Desired Baud
Rate
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
57600
115200
Table 7. Baud Rates
1.8432 MHz
Decimal Divisor
Used to
Generate 16 x
Clock
2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
6
3
2
1
Percent Error
Difference
Between
Desired and
Actual
-
-
0.026
0.058
-
-
-
-
-
0.69
-
-
-
-
-
-
-
2.86
Desired Baud
Rate
50
-
110
-
-
300
-
1200
-
-
2400
-
4800
-
9600
19200
38400
57600
115200
3.6864 MHz
Decimal Divisor
Used to
Generate 16 x
Clock
4608
-
2094
-
-
768
-
192
-
-
96
-
48
-
24
12
6
4
2
Percent Error
Difference
Between
Desired and
Actual
-
-
0.026
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
133