GDC21D601 Datasheet, PDF (84/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
3.2 Interrupt Control
The interrupt controller provides interrupt source status and interrupt request status. The interrupt mask registers
are used to determine whether an active interrupt source should generate an interrupt request to the processor or
not. A logic HIGH in the interrupt mask register indicates that the interrupt source is masked and then doesn’t
generate a request.
FIQ mask register and IRQ mask register indicate whether the interrupt source causes a processor interrupt or not.
The interrupt mode is configured by interrupt trigger mode register and interrupt trigger polarity register. And
Interrupt direction register indicates whether each interrupt source drives IRQ or FIQ.
The FIQ and IRQ status register is used to reflect the status of all channels set to produce an FIQ interrupt or IRQ
interrupt. And the status registers are cleared by writing ‘1’ to the status clear register at the edge trigger mode
only.
Source Mask
Control
Trigger Mode Polarity
Control
Control
Direction
Control
IRQ source0
IRQ source1
IRQ source2
IRQ source3
IRQ source4
IRQ source5
:
:
:
:
:
:
IRQ source20
IRQ source21
IRQ source22
IRQ source23
IRQ source24
IRQ source25
Mask
Control
26
Edge/
Level
Control
26
High/
Low,
Rising/
Falling
Control
26
FIQ
or
IRQ
26
Clear Control
Status
Control
FIQ
Request
Control
FIQ
Mask
nFIQ
IRQ
IRQ
Mask
nIRQ
26
26
Figure 3. Interrupt Control Flow Diagram
TIC registers are used only for the production test. TIC input register is used to drive interrupt request sources by
the CPU. When this register bit 26 is set, other bits of TIC input register are regarded as interrupt sources. This bit
is cleared by system reset and should be cleared in normal operation.
Bit 25 is used as a software interrupt source. When source mask control register bit 25 is HIGH, an interrupt
request occurs. To disable the software interrupt, Source Mask Control Register bit 25 should be Low. Software
interrupt source input is fixed active HIGH and level sensitive.
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