GDC21D601 Datasheet, PDF (58/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
4.4 BCLK and FCLK Control Register and BCLK Frequency Control Register
This register controls BCLK of ASB and FCLK of ARM720T. User can save the power by reduce of the clock
speed. At any moment, user can change the BCLK speed but it may push the system into unstable stage, so user
must change the clock speed only in BUS IDLE; this means there is no interaction between the devices used by
BCLK and any other devices used by PCLK. User can control the bus mode that are standard-bus mode and fast-
bus mode. The BCLK is only used in the fast-bus mode and ARM720T uses the both clock FCLK and BCLK in
the fast bus mode. The address is PMU_BASE + 0x04h.
Table 5. CLKCR Bit Functions
BIT
INITIAL
NAME
FUNCTION
2-0
000
BCLKCR[2:0] Control register for BCLK selection
000 - BCLK is divided SYS_CLK by 2
001 - BCLK is divided SYS_CLK by 4
010 - BCLK is divided SYS_CLK by 8
011 - BCLK is divided SYS_CLK by 16
100 - BCLK is divided SYS_CLK by 32
101 - BCLK is divided SYS_CLK by 64
110 - BCLK is divided SYS_CLK by 128
111 - BCLK is SYS_CLK.
BIT
3
INITIAL
1
Table 6. CLKCR Bit Functions
NAME
BCLKCR[3]
FUNCTION
Control register to use in FCLK mode
1 – Fast-bus mode (not use the FCLK)
0 – Standard-bus mode
use the FCLK that same the SYS_CLK
4.5 BCLK Mask Register for the RUN & PD Mode.
This register is used for masking BCLK of ASB devices in the RUN and PD mode. When each control bits are
written to “1 or 0”, each clock of devices is controlled by enabled or disabled clock in the RUN and PD mode. The
address of the mask control register are as follows.; BCLKMSK_RUN is PMU_BASE + 0x08h, BCLKMSK_PD
is PMU_BASE + 0x0Ch. When this is 1, it is enable clock. When 0, disable clock.
BIT
15-13
12
11
10
9
8
7
6-1
0
Table 7. BCLKMSK Bit Functions for RUN Mode
INITIAL
1
1
1
1
1
1
1
111111
1
NAME
BCLKMSK_RUN
FUNCTION
Reserved bit
APB Bridge clock mask bit
BUS Controller clock mask bit
DRAM Controller clock mask bit
DMA Controller clock mask bit
TEST Controller clock mask bit
SRAM clock mask bit
Reserved bit
B_CLK Out mask bit
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