GDC21D601 Datasheet, PDF (148/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

Section 17. I²C Controller
GDC21D601
1. General Description
The I²C controller allows the GDC21D601 to exchange data with a number of other I²C devices such as micro
controller, EEPROMs, real-time clock devices, A/D converters, LCD displays, NTSC/PAL encoder, and etc.
The I²C is a synchronous bus that is used to connect several ICs on a board. The I²C bus uses two wires, serial data
(SDA), and serial clock (SCL) to carry information between the ICs connected to the bus.
The I²C controller consists of transmitter and receiver sections, an independent baud rate generator, and a control
unit. The transmitter and receiver sections use the same clock, which is derived from the I²C controller baud rate
generator in master mode. Refer to Figure 1. for the I²C controller block diagram.
The GDC21D601 I²C bit7(MSB) is shifted out first.
CLK
P_SEL
P_WRITE
P_STB
P_D
P_A
RESET
Clock divider
Baud register
Control register
Data register
Status register
Address register
Test register
FSM
SCL driver
SDA driver
APB(AMBA) interface
Interrupt generate
Figure 1. I²C Block Diagram
SCL_OUT
SCL_IN
SDA_OUT
SDA_IN
Interrupt
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