GDC21D601 Datasheet, PDF (3/189 Pages) Hynix Semiconductor – 32-Bit RISC MCU

GDC21D601
TABLE OF CONTENTS
Section 1. Overview ..................................................................................................................... 8
1. General Description .............................................................................................................. 8
2. Feature................................................................................................................................ 10
3. Package .............................................................................................................................. 12
4. Pin Assignment ................................................................................................................... 13
5. Pin Descriptions .................................................................................................................. 15
Section 2. System Architecture ................................................................................................ 20
1. Internal Bus Architecture..................................................................................................... 20
2. Arbiter ................................................................................................................................. 20
3. System Decoder ................................................................................................................. 21
4. Memory Map ....................................................................................................................... 21
5. Memory Format................................................................................................................... 22
6. Boot Mode........................................................................................................................... 22
7. Multi-Function Pin ............................................................................................................... 23
Section 3. ARM720T Core.......................................................................................................... 24
1. General Description ............................................................................................................ 24
2. Feature................................................................................................................................ 24
3. Core Block Diagram............................................................................................................ 26
Section 4. DRAM Controller ...................................................................................................... 27
1. General Description ............................................................................................................ 27
2. Hardware Interface and Signal Description ........................................................................ 28
3. Functional Description ........................................................................................................ 31
4. Register Description............................................................................................................ 34
Section 5. On-Chip SRAM ......................................................................................................... 37
1. General Description ............................................................................................................ 37
2. Signal Description ............................................................................................................... 37
3. Function Description ........................................................................................................... 37
Section 6. Static Memory Controller ........................................................................................ 38
1. General Description ............................................................................................................ 38
2. Signal Description ............................................................................................................... 39
3. Functional Description ........................................................................................................ 43
4. Programmer’ s Model.......................................................................................................... 45
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