MC68HC08AZ0 Datasheet, PDF (88/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
System Integration Module (SIM)
Introduction
This section describes the system integration module, which supports up
to 24 external and/or internal interrupts. Together with the CPU, the SIM
controls all MCU activities. A block diagram of the SIM is shown in
Figure 1. Table 1 is a summary of the SIM I/O registers. The SIM is a
system state controller that coordinates CPU and exception timing. The
SIM is responsible for:
• Bus clock generation and control for CPU and peripherals
– STOP/WAIT/reset/break entry and recovery
– Internal clock control
• Master reset control, including power-on reset (POR) and COP
timeout
• Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
• CPU enable/disable timing
• Modular architecture expandable to 128 interrupt sources
MC68HC08AZ0
86
System Integration Module (SIM)
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