MC68HC08AZ0 Datasheet, PDF (305/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Programmable Interrupt Timer (PIT)
I/O registers
I/O registers
The following I/O registers control and monitor operation of the PIT:
• PIT status and control register (PSC)
• PIT counter registers (PCNTH:PCNTL)
• PIT counter modulo registers (PMODH:PMODL)
PIT status and
control register
(PSC)
The PIT status and control register does the following:
• Enables PIT interrupt
• Flags PIT overflows
• Stops the PIT counter
• Resets the PIT counter
• Prescales the PIT counter clock
Bit 7
6
5
4
3
2
1
PSC
$004B
Read:
Write:
POF
0
0
PIE PSTOP
PRST
0
PPS2 PPS1
Reset: 0
0
1
0
0
0
0
= Unimplemented
Figure 2. PIT Status and Control Register (TSC)
Bit 0
PPS0
0
5-pit
MOTOROLA
Programmable Interrupt Timer (PIT)
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MC68HC08AZ0
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