MC68HC08AZ0 Datasheet, PDF (270/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Timer Interface Module A (TIMA)
PS[2:0] — Prescaler Select Bits
These read/write bits select either the PTD6/ATD14/TACLK pin or
one of the seven prescaler outputs as the input to the TIMA counter
as Table 2 shows. Reset clears the PS[2:0] bits.
PS[2:0]
000
001
010
011
100
101
110
111
Table 2. Prescaler selection
TIMA clock source
Internal Bus Clock ÷1
Internal Bus Clock ÷ 2
Internal Bus Clock ÷ 4
Internal Bus Clock ÷ 8
Internal Bus Clock ÷ 16
Internal Bus Clock ÷ 32
Internal Bus Clock ÷ 64
PTD6/ATD14/TACLK
TIMA counter
registers
(TACNTH:TACNTL)
The two read-only TIMA counter registers contain the high and low bytes
of the value in the TIMA counter. Reading the high byte (TACNTH)
latches the contents of the low byte (TACNTL) into a buffer. Subsequent
reads of TACNTH do not affect the latched TACNTL value until TACNTL
is read. Reset clears the TIMA counter registers. Setting the TIMA reset
bit (TRST) also clears the TIMA counter registers
NOTE:
If you read TACNTH during a break interrupt, be sure to unlatch
TACNTL by reading TACNTL before exiting the break interrupt.
Otherwise, TACNTL retains the value latched during the break.
MC68HC08AZ0
268
Timer Interface Module A (TIMA)
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