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MC68HC08AZ0 Datasheet, PDF (197/444 Pages) Motorola, Inc – Advance Information
17-sci
MOTOROLA
Freescale Semiconductor, Inc.
Serial Communications Interface Module (SCI)
Functional description
• Framing error (FE) — The FE bit in SCS1 is set when a ‘0’ occurs
where the receiver expects a stop bit. The framing error interrupt
enable bit, FEIE, in SCC3 enables FE to generate SCI error CPU
interrupt requests.
• Parity error (PE) — The PE bit in SCS1 is set when the SCI
detects a parity error in incoming data. The parity error interrupt
enable bit, PEIE, in SCC3 enables PE to generate SCI error CPU
interrupt requests.
Error flags during DMA service requests
When the DMA is servicing the SCI receiver, it clears the SCRF bit
when it reads the SCI data register. The DMA does not clear the other
status bits (BKF or RPF), nor does it clear error bits (OR, NF, FE, and
PE). If the error bits are enabled to generate interrupt requests, the
interrupt requests may accumulate during DMA servicing. To clear
error bits while the DMA is servicing the receiver, enable SCI error
CPU interrupts and clear the bits in an interrupt routine. Note the
following latency considerations:
1. If interrupt latency is short enough for an error bit to be serviced
before the next SCRF, then it can be determined which byte
caused the error. If interrupt latency is long enough for a new
SCRF to occur before servicing an error bit, then:
a. It cannot be determined whether the error bit being serviced is
due to the byte in the SCI data register or to a previous byte.
Multiple errors can accumulate that correspond to different
bytes. In a message-based system, you may have to repeat
the entire message
b. When the DMA is enabled to service the SCI receiver, merely
reading the SCI data register clears the SCRF bit. The second
step in clearing an error bit, reading the SCI data register,
could inadvertently clear a new, unserviced SCRF that
occurred during the error-servicing routine. Then the DMA
would ignore the byte that set the new SCRF, and the new
byte would be lost.
To prevent clearing of an unserviced SCRF bit, clear the
SCRIE bit at the beginning of the error-servicing interrupt
routine and set it at the end. Clearing SCRIE disables DMA
Serial Communications Interface Module (SCI)
For More Information On This Product,
Go to: www.freescale.com
MC68HC08AZ0
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