MC68HC08AZ0 Datasheet, PDF (145/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Break Module
Break module registers
Break module registers
Three registers control and monitor operation of the break module:
• Break status and control register (BRKSCR)
• Break address register high (BRKH)
• Break address register low (BRKL)
Break status and
control register
(BRKSCR)
The break status and control register contains break module enable and
status bits.
Bit 7
6
5
4
3
2
1
Bit 0
BRKSCR
$FE0E
Read:
Write:
BRKE
BRKA
0
0
0
0
0
0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 12. Break status and control register (BRKSCR)
BRKE — Break enable bit
This read/write bit enables breaks on break address register matches.
BRKE is cleared by writing a ‘0’ to bit 7. Reset clears the BRKE bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled on 16-bit address match
BRKA — Break active bit
This read/write status and control bit is set when a break address
match occurs. Writing a ‘1’ to BRKA generates a break interrupt.
BRKA is cleared by writing a ‘0’ to it before exiting the break routine.
Reset clears the BRKA bit.
1 = Break address match
0 = No break address match
5-brk
MOTOROLA
Break Module
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MC68HC08AZ0
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