MC68HC08AZ0 Datasheet, PDF (366/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
msCAN08 Controller (msCAN08)
• Error Interrupt: An overrun, error or warning condition occurred.
The Receiver Flag Register (CRFLG) will indicate one of the
following conditions:
– Overrun: An overrun condition as described in Receive
structures on page 356, has occurred.
– Receiver Warning: The Receive Error Counter has reached
the CPU Warning limit of 96.
– Transmitter Warning: The Transmit Error Counter has reached
the CPU Warning limit of 96.
– Receiver Error Passive: The Receive Error Counter has
exceeded the Error Passive limit of 127 and msCAN08 has
gone to Error Passive state.
– Transmitter Error Passive: The Transmit Error Counter has
exceeded the Error Passive limit of 127 and msCAN08 has
gone to Error Passive state.
– Bus Off: The Transmit Error Counter has exceeded 255 and
msCAN08 has gone to Bus Off state.
Interrupt
acknowledge
Interrupts are directly associated with one or more status flags in either
the msCAN08 Receiver Flag Register (CRFLG) or the msCAN08
Transmitter Control Register (CTCR). Interrupts are pending as long as
one of the corresponding flags is set. The flags in above registers must
be reset within the interrupt handler in order to handshake the interrupt.
The flags are reset through writing a “1” to the corresponding bit position.
A flag can not be cleared if the respective condition still prevails.
CAUTION: Bit manipulation instructions (BSET) shall not be used to clear interrupt
flags. The ‘OR’ instruction is the appropriate way to clear selected flags.
Interrupt vectors
The msCAN08 supports four interrupt vectors as shown in Table 1. The
vector addresses are dependent on the chip integration and to be
defined. The relative interrupt priority is also integration dependent and
to be defined.
MC68HC08AZ0
364
msCAN08 Controller (msCAN08)
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