MC68HC08AZ0 Datasheet, PDF (84/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Central Processor Unit (CPU)
Table 1 Instruction Set Summary (Continued)
Source
Form
Operation
Description
Effect on
CCR
VH I NZC
TST opr
TSTA
TSTX
TST opr,X
TST ,X
TST opr,SP
Test for Negative or Zero
DIR
3D dd 3
INH
4D
1
(A) – $00 or (X) – $00 or (M) – $00
0
–
–
¤
¤
–
INH
IX1
5D
1
6D ff
3
IX
7D
2
SP1 9E6D ff
4
TSX
Transfer SP to H:X
H:X ← (SP) + 1
– – – – – – INH
95
2
TXA
Transfer X to A
A ← (X)
– – – – – – INH
9F
1
TXS
Transfer H:X to SP
(SP) ← (H:X) – 1
– – – – – – INH
94
2
A Accumulatorn
C Carry/borrow bitopr
CCRCondition code registerPC
ddDirect address of operandPCH
dd rrDirect address of operand and relative offset of branch instructionPCL
DDDirect to direct addressing modeREL
DIRDirect addressing moderel
DIX+Direct to indexed with post increment addressing moderr
ee ffHigh and low bytes of offset in indexed, 16-bit offset addressingSP1
EXTExtended addressing modeSP2
ff Offset byte in indexed, 8-bit offset addressingSP
H Half-carry bitU
H Index register high byteV
hh llHigh and low bytes of operand address in extended addressingX
I Interrupt maskZ
ii Immediate operand byte&
IMDImmediate source to direct destination addressing mode|
IMMImmediate addressing mode⊕
INHInherent addressing mode( )
IXIndexed, no offset addressing mode–( )
IX+Indexed, no offset, post increment addressing mode#
IX+DIndexed with post increment to direct addressing mode«
IX1Indexed, 8-bit offset addressing mode←
IX1+Indexed, 8-bit offset, post increment addressing mode?
IX2Indexed, 16-bit offset addressing mode:
MMemory location¤
N Negative bit—
Any bit
Operand (one or two bytes)
Program counter
Program counter high byte
Program counter low byte
Relative addressing mode
Relative program counter offset byte
Relative program counter offset byte
Stack pointer, 8-bit offset addressing mode
Stack pointer 16-bit offset addressing mode
Stack pointer
Undefined
Overflow bit
Index register low byte
Zero bit
Logical AND
Logical OR
Logical EXCLUSIVE OR
Contents of
Negation (two’s complement)
Immediate value
Sign extend
Loaded with
If
Concatenated with
Set or cleared
Not affected
Opcode Map
MC68HC08AZ0
82
Central Processor Unit (CPU)
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16-cpu
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