MC68HC08AZ0 Datasheet, PDF (352/444 Pages) Motorola, Inc – Advance Information

I/O Ports
Freescale Semiconductor, Inc.
DDRH[1:0] — Data direction register H bits
These read/write bits control port H data direction. Reset clears
DDRH[1:0], configuring all port H pins as inputs.
1 = Corresponding port H pin configured as output
0 = Corresponding port H pin configured as input
NOTE: Avoid glitches on port H pins by writing to the port H data register before
changing data direction register H bits from 0 to 1.
Figure 24 shows the port H I/O logic.
READ DDRH ($000E)
WRITE DDRH ($000E)
RESET
WRITE PTH ($000A)
READ PTH ($000A)
DDRHx
PTHx
PTGx
Figure 24. Port H I/O circuit
When bit DDRHx is a logic one, reading address $000B reads the PTHx
data latch. When bit DDRHx is a logic zero, reading address $000B
reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data.
MC68HC08AZ0
350
I/O Ports
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