MC68HC08AZ0 Datasheet, PDF (174/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
External Interrupt Module (IRQ)
Functional description
A ‘0’ applied to any of the external interrupt pins can latch a CPU
interrupt request. Figure 3 shows the structure of the IRQ module.
Interrupt signals on the IRQ pin are latched into the IRQ latch. An
interrupt latch remains set until one of the following occurs:
• Vector fetch — a vector fetch automatically generates an interrupt
acknowledge signal which clears the latch that caused the vector
fetch.
• Software clear — software can clear an interrupt latch by writing
to the appropriate acknowledge bit in the interrupt status and
control register (ISCR). Writing a ‘1’ to the ACK1 bit clears the IRQ
latch.
• Reset — a reset automatically clears the interrupt latch.
ACK1
VECTOR
FETCH
DECODER
TO CPU FOR
BIL/BIH
INSTRUCTIONS
V_DD
IRQF
IRQ
D ^CLR Q
CK
SYNCHRO-
NIZER
IRQ
INTERRUPT
REQUEST
IRQ
LATCH
IMASK1
MC68HC08AZ0
172
MODE1
HIGH
VOLTAGE
DETECT
Figure 3. IRQ module block diagram
TO MODE
SELECT
LOGIC
All of the external interrupt pins are falling-edge-triggered and are
software-configurable to be both falling-edge and low-level-triggered.
The MODE1 bit in the ISCR controls the triggering sensitivity of the IRQ
pin.
External Interrupt Module (IRQ)
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2-irq
MOTOROLA