MC68HC08AZ0 Datasheet, PDF (260/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Timer Interface Module A (TIMA)
NOTE:
In buffered output compare operation, do not write new output compare
values to the currently active channel registers. Writing to the active
channel registers is the same as generating unbuffered output
compares.
Pulse width
modulation (PWM)
By using the toggle-on-overflow feature with an output compare channel,
the TIMA can generate a PWM signal. The value in the TIMA counter
modulo registers determines the period of the PWM signal. The channel
pin toggles when the counter reaches the value in the TIMA counter
modulo registers. The time between overflows is the period of the PWM
signal.
As Figure 2 shows, the output compare value in the TIMA channel
registers determines the pulse width of the PWM signal. The time
between overflow and output compare is the pulse width. Program the
TIMA to clear the channel pin on output compare if the state of the PWM
pulse is logic one. Program the TIMA to set the pin if the state of the
PWM pulse is logic zero.
OVERFLOW
OVERFLOW
OVERFLOW
PERIOD
PTE/F/x/TACHx
PULSE
WIDTH
MC68HC08AZ0
258
OUTPUT
COMPARE
OUTPUT
COMPARE
Figure 2. PWM period and pulse width
OUTPUT
COMPARE
The value in the TIMA counter modulo registers and the selected
prescaler output determines the frequency of the PWM output. The
frequency of an 8-bit PWM signal is variable in 256 increments. Writing
$00FF (255) to the TIMA counter modulo registers produces a PWM
period of 256 times the internal bus clock period if the prescaler select
Timer Interface Module A (TIMA)
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8-tima
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