MC68HC08AZ0 Datasheet, PDF (179/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
External Interrupt Module (IRQ)
IRQ status and control register (ISCR)
IRQF — IRQ flag
This read-only status bit is high when the IRQ interrupt is pending.
1 = Interrupt pending
0 = Interrupt not pending
ACK1 — IRQ interrupt request acknowledge bit
Writing a ‘1’ to this write-only bit clears the IRQ latch. ACK1 always
reads as ‘0’. Reset clears ACK1.
IMASK1 — IRQ Interrupt mask bit
Writing a ‘1’ to this read/write bit disables IRQ interrupt requests.
Reset clears IMASK1.
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
MODE1 — IRQ edge/level select bit
This read/write bit controls the triggering sensitivity of the IRQ/V_PP pin.
Reset clears MODE1.
1 = Interrupt requests on falling edges and low levels
0 = Interrupt requests on falling edges only
7-irq
MOTOROLA
External Interrupt Module (IRQ)
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MC68HC08AZ0
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