MC68HC08AZ0 Datasheet, PDF (334/444 Pages) Motorola, Inc – Advance Information

I/O Ports
Freescale Semiconductor, Inc.
Data direction
register B (DDRB)
Data direction register B determines whether each port B pin is an input
or an output. Writing a logic one to a DDRB bit enables the output buffer
for the corresponding port B pin; a logic zero disables the output buffer.
DDRB
$0005
Bit 7
6
5
4
3
2
1
Bit 0
Read:
DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 5. Data direction register B (DDRB)
DDRB[7:0] — Data direction register B Bits
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE: Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 6 shows the port B I/O logic.
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
READ PTB ($0001)
DDRBx
PTBx
Figure 6. Port B I/O circuit
PTBx
MC68HC08AZ0
332
I/O Ports
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