MC68HC08AZ0 Datasheet, PDF (247/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Serial Peripheral Interface Module (SPI)
I/O registers
0 = Normal push-pull SPSCK, MOSI, and MISO pins
SPE — SPI enable
This read/write bit enables the SPI module. Clearing SPE causes a
partial reset of the SPI. See Resetting the SPI on page 237. Reset
clears the SPE bit.
1 = SPI module enabled
0 = SPI module disabled
SPTIE— SPI transmit interrupt enable
This read/write bit enables CPU interrupt requests generated by the
SPTE bit. SPTE is set when a byte transfers from the transmit data
register to the shift register. Reset clears the SPTIE bit.
1 = SPTE CPU interrupt requests enabled
0 = SPTE CPU interrupt requests disabled
29-spi
MOTOROLA
Serial Peripheral Interface Module (SPI)
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MC68HC08AZ0
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