MC68HC08AZ0 Datasheet, PDF (158/444 Pages) Motorola, Inc – Advance Information

Freescale Semiconductor, Inc.
Monitor ROM (MON)
the MUL[7:4] bits in the PLL programming register (PPG). Refer to
Clock Generator Module (CGM) on page 107.
Monitor
Baud Rate
4.9152 MHz
4.194 MHz
Table 9. Monitor Baud Rate Selection
1
4800
4096
VCO Frequency Multiplier (N)
2
3
4
5
9600 14,400 19,200 24,000
8192 12,288 16,384 20,480
6
28,800
24,576
Later revisions feature a monitor mode which is optimised to operate
with either a 4.1952MHz crystal clock source (or multiples of
4.1952MHz) or a 4MHz crystal (or multiples of 4MHz). This supports
designs which use the MSCAN module, which is generally clocked from
a 4MHz, 8MHz or 16MHz crystal. The table below outlines the available
baud rates for a range of crystals and how they can match to a PC baud
rate.
Table 10
Baud rate
Closest PC baud PC
Error %
Clock freq PTC3=0 PTC3=1 PTC3=0 PTC3=1 PTC3=0 PTC3=1
32kHz
57.97
28.98
57.6
28.8
0.64
0.63
1MHz
1811.59 905.80
1800
900
0.64
0.64
2MHz
3623.19 1811.59 3600
1800
0.64
0.64
4MHz
7246.37 3623.19 7200
3600
0.64
0.64
4.194MHz 7597.83 3798.91 7680
3840
1.08
1.08
4.9152MHz 8904.35 4452.17 8861
4430
0.49
0.50
8MHz 14492.72 7246.37 14400
7200
0.64
0.64
16MHz 28985.51 14492.75 28800 14400
0.64
0.64
Care should be taken when setting the baud rate since incorrect
baud rate setting can result in communications failure.
MC68HC08AZ0
156
Monitor ROM (MON)
For More Information On This Product,
Go to: www.freescale.com
10-mon
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