MC68HC08AZ0 Datasheet, PDF (313/444 Pages) Motorola, Inc – Advance Information

Continuous
conversion
Accuracy and
precision
Freescale Semiconductor, Inc.
Analog-to-Digital Converter (ADC)
Interrupts
In the continuous conversion mode, the ADC Data Register will be filled
with new data after each conversion. Data from the previous conversion
will be overwritten whether that data has been read or not. Conversions
will continue until the ADCO bit is cleared. The COCO bit is set after the
first conversion and will stay set for the next several conversions until the
next write of the ADC status and control register or the next read of the
ADC data register.
The conversion process is monotonic and has no missing codes.
Interrupts
When the AIEN bit is set, the ADC module is capable of generating either
CPU or DMA interrupts after each ADC conversion. A CPU interrupt is
generated if the COCO/IDMAS bit is at logic zero. 1 zero. If the
COCO/IDMAS bit is set, a DMA interrupt is generated. The
COCO/IDMAS bit is not used as a conversion complete flag when
interrupts are enabled.
Low power modes The WAIT and STOP instruction can put the MCU in low power
consumption standby modes.
WAIT mode
The ADC continues normal operation during WAIT mode. Any enabled
CPU interrupt request from the ADC can bring the MCU out of wait
mode. If the ADC is not required to bring the MCU out of wait mode,
power down the ADC by setting ADCH[4:0] bits in the ADC Status and
Control Register before executing the WAIT instruction.
STOP mode
The ADC module is inactive after the execution of a STOP instruction.
Any pending conversion is aborted. ADC conversions resume when the
MCU exits stop mode after an external interrupt. Allow one conversion
cycle to stabilize the analog circuitry.
5-adc
MOTOROLA
Analog-to-Digital Converter (ADC)
For More Information On This Product,
Go to: www.freescale.com
MC68HC08AZ0
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